SUPERTHEME - Publications

Public deliverables are available under Project Information.

Pulbications from the project will be listed here once they have been published.

Below you will find also selected publications describing background work by the project partners.

SUPERTHEME Publications

SUPERTHEME Overview Posters

SUPERTHEME Poster shown at the European Nanoelectronics Forum 2016, Novermber 23-24, Rome

SUPERTHEME Posters shown at the European Nanoelectronics Forum 2015, December 1-2, Berlin

SUPERTHEME Posters shown at the European Nanoelectronics Forum 2013, November 27-28, Barcelona

SUPERTHEME Poster for 9th International Nanotechnology Conference on Communication and Cooperation (INC9), Berlin, May 14-17, 2013

Publications 2016

E. Baer, J. Niess, Equipment Simulation for Studying the Growth Rate and its Uniformity of Oxide Layers Deposited by Plasma-Enhanced Oxidation, in: Proceedings of Conference on Simulation of Semiconductor Processes and Devices 2016 (SISPAD 2016), p. 137     Download

E. Baer, A. Burenkov, P. Evanschitzky, J. Lorenz, Simulation of Process Variations in FinFET Transistor Patterning, in: Proceedings of Conference on Simulation of Semiconductor Processes and Devices 2016 (SISPAD 2016), p. 299     Download

A. Burenkov, J. Lorenz, Simulation of Thermo-mechanical Effect in Bulk-silicon FinFETs, Materials Science in Semiconductor Processing 42 (2016) 242

L. Filipovic, S. Selberherr, Stress Considerations for System-on-Chip Gas Sensor Integration in CMOS Technology, IEEE Transactions on Device and Materials Reliability 16 (2016) 483

L. Wang, T. Sadi, M. Nedjalkov, A. R. Brown, C. Alexander, B. Cheng, C. Millar, A. Asenov, Simulation Analysis of the Electro-thermal Performance of SOI FinFETs, in: Proc. of Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS) 2016

X. Wang, D. Reid, L. Wang, C. Millar, A. Burenkov, P. Evanschitzky, E. Bär, J. Lorenz, A. Asenov, Process Informed Accurate Compact Modelling of 14-nm FinFET Variability and Application to Statistical 6T-SRAM Simulations, in: Proceedings of Conference on Simulation of Semiconductor Processes and Devices 2016 (SISPAD 2016), p. 303     Download

Publications 2015


E. Baer, P. Evanschitzky, J. Lorenz, F. Roger, R. Minixhofer, L. Filipovic, R.L. de Orio, S. Selberherr, Coupled Simulation to Determine the Impact of across Wafer Variations in Oxide PECVD on Electrical and Reliability Parameters of Through-silicon Vias, Microelectronic Engineering 137 (2015) 141

A. Burenkov, J. Lorenz, Y. Spiegel, F. Torregrosa, Simulation of Plasma Immersion Ion Implantation into Silicon, in: Proceedings of Conference on Simulation of Semiconductor Processes and Devices 2015 (SISPAD 2015), p. 218  Download

L. Filipovic, A.P. Singulani, F. Roger, S. Carniello, S. Selberherr, Intrinsic Stress Analysis of Tungsten-lined open TSVs, Microelectr. Reliab. 55 (2015) 1843

A. Lange, I. Harasymiv, O. Eisenberger, F. Roger, J. Haase, R. Minixhofer, Towards Probabilistic Analog Behavioral Modeling, in: Proc. of 2015 IEEE International Symposium on Circuits and Systems (ISCAS), p. 2728  Download

R. Nagy, A. Burenkov, J. Lorenz, Numerical Evaluation of the ITRS Transistor Scaling, J. Comput. Electron. 14 (2015) 192

F. Roger, A. Singulani, S. Carniello, L. Filipovic, S. Selberherr, Global Statistical Methodology for the Analysis of Equipment Parameter Effects on TSV Formation, in: Proceedings VARI Conference 2015, p. 39

L. Wang, A. R. Brown, M. Nedjalkov, C. Alexander, B. Cheng, C. Millar, A. Asenov, Impact of Self-Heating on the Statistical Variability in Bulk and SOI FinFETs, IEEE Trans. Electr. Dev. 62 (2015) 2106

L. Wang, T. Sadi, M. Nedjalkov, A. R. Brown, C. Alexander, B. Cheng, C. Millar, A. Asenov. An Advanced Electro-Thermal Simulation Methodology For Nanoscale Device, in: Proceedings of IEEE 2015 International Workshop on Computational Electronics (IWCE 2015), p. 1

L. Wang, A. R. Brown, M. Nedjalkov, C. Alexander, B. Cheng, C. Millar, A. Asenov, 3D Electro-Thermal Simulations of Bulk FinFETs with Statistical Variations, in: Proceedings of Conference on Simulation of Semiconductor Processes and Devices 2015 (SISPAD 2015), p. 112  Download

X. Wang, D. Reid, L. Wang, A. Burenkov, C. Millar, J. Lorenz, A. Asenov, Hierarchical Variability-Aware Compact Models of 20nm Bulk CMOS,in: Proceedings of Conference on Simulation of Semiconductor Processes and Devices 2015 (SISPAD 2015), p. 325  Download

Publications 2014

S.M. Amoroso, L. Gerrer, M. Nedjalkov, R. Hussin, C. Alexander, A. Asenov,
Modeling Carrier Mobility in Nano-MOSFETs in the Presence of Discrete Trapped Charges: Accuracy and Issues, IEEE Trans. Electr. Dev. 61 (2014) 1292

A. Burenkov, J. Lorenz, Y. Spiegel, F. Torregrosa, Simulation of AsH3 Plasma Immersion Ion Implantation into Silicon, in: Proceedings International Conference on Ion Implantation Technology (IIT) 2014

L. Filipovic, R.L. de Orio, S. Selberherr, Effects of Sidewall Scallops on the Performance and Reliability of Filled Copper and Open Tungsten TSVs, in: Proc. IEEE 21st International Symposium on the Physical and Failure Analysis of Integrated Ciruits (IPFA) 2014, p. 321

L. Filipovic, R.L. de Orio, S. Selberherr, A. Singulani, F. Roger, R. Minixhofer, Effects of Sidewall Scallops on Open Tungsten TSVs, Proceedings International Relaibility Physics Symposium (IRPS) 2014

L. Filipovic, R.L. de Orio, S. Selberherr, Process and Reliability of SF6/O2 Plasma Etched Copper TSVs, Proceedings EuroSimE 2014

L. Filipovic, F. Rudolf, E. Baer, P. Evanschitzky, J. Lorenz, F. Roger, A. Singulani, R. Minixhofer, S. Selberherr, Three-Dimensional Simulation for the Reliability and Electrical Performance of Through-Silicon Vias, in: Proceedings of Conference on Simulation of Semiconductor Processes and Devices 2014 (SISPAD 2014), p. 341  Download

L. Filipovic, S. Selberherr, The Effects of Etching and Deposition on the Performance and Stress Evolution of Open Through Silicon Vias, Microelectr. Reliab. 54 (2014) 1953

J. Lorenz, E. Bär, A. Burenkov, P. Evanschitzky, A. Asenov, L. Wang, X. Wang, A.R. Brown, C. Millar, D. Reid, Simultaneous Simulation of Systematic and Stochastic Process Variations, in: Proceedings of Conference on Simulation of Semiconductor Processes and Devices 2014 (SISPAD 2014), p. 289  Download

L. Wang, A. R. Brown, M. Nedjalkov, C. Alexander, B. Cheng, C. Millar, A. Asenov, 3D Coupled Electro-Thermal Simulations for SOI FinFET with Statistical Variations Including the Fin Shape Dependence of the Thermal Conductivity, 2014 IEEE 12th International Conference on Solid-State and Integrated Circuit Technology (ICSICT 2014), Guilin, China, Oct. 2014

L. Wang, A. R. Brown, M. Nedjalkov, C. Alexander, B. Cheng, C. Millar, A. Asenov, 3D Coupled Electro-Thermal FinFET Simulations Including the Fin Shape Dependence of the Thermal Conductivity, in: Proceedings of Conference on Simulation of Semiconductor Processes and Devices 2014 (SISPAD 2014), p. 269  Download

L. Wang, A.R. Brown, C. Millar, A. Burenkov, X. Wang, A. Asenov, J. Lorenz, Simulation for Statistical Variability in Realistic 20 nm MOSFET, in: Proceedings of the 15th International Conference on Ultimate Integration on Silicon (ULIS), 2014, p. 5

X. Wang, D. Reid, L. Wang, A. Burenkov, C. Millar, B. Cheng, A. Lange, J. Lorenz, E. Baer, A. Asenov, Variability-Aware Compact Model Strategy for 20-nm Bulk MOSFETs, in: Proceedings of Conference on Simulation of Semiconductor Processes and Devices 2014 (SISPAD 2014), p. 293 Download

Publications 2013

S.M. Amoroso, L. Gerrer, J.M. Sellier, I. Dimov, M. Nedjalkov, S. Selberherr, A. Asenov, Quantum Insights in Gate Oxide Charge-Trapping Dynamics in Nanoscale MOSFETs, in: Simulation of Semiconductor Processes and Devices (SISPAD) 2013, IEEE, p. 25  Download

P. Evanschitzky, A. Burenkov, J. Lorenz, Double Patterning: Simulating a Variability Challenge for Advanced Transistors in: Simulation of Semiconductor Processes and Devices (SISPAD) 2013, IEEE, p. 105  Download

J.M. Sellier, M. Nedjalkov, I. Dimov, and S. Selberherr, Decoherence and Time Reversibility: The Role of Randomness at Interfaces, J. Appl. Phys. 114 (2013) 174902

Publications on Partners' Background Work

A. Asenov, Random dopant induced threshold voltage lowering and fluctuations in sub-0.1 μm MOSFET's: A 3-D “atomistic” simulation study, IEEE Transactions on Electron Devices, Vol. 45, No. 12, p. 2505-2513, (1998)

A. Asenov, G. Slavcheva, A.R. Brown, J.H. Davies, S. Saini, Increase in the random dopant induced threshold fluctuations and lowering in sub-100 nm MOSFETs due to quantum effects: A 3-D density-gradient simulation study, IEEE Transactions on Electron Devices, Vol. 48, No. 4, p. 722-729, (2001)

A. Asenov, A.R. Brown, J.H. Davies, S. Kaya, G. Slavcheva, Simulation of intrinsic parameter fluctuations in decananometer and nanometer-scale MOSFETs, IEEE Transactions on Electron Devices, Vol. 50, No. 9, p.1837-1852, (2003)

A. Asenov, S. Kaya, A.R. Brown, Intrinsic parameter fluctuations in decananometer MOSFETs introduced by gate line edge roughness, IEEE Transactions on Electron Devices, Vol. 50, No. 5, p. 1254-1260, (2003)

A. Burenkov, A. Hahn, Y. Spiegel, H. Etienne, F. Torregrosa: Simulation of BF3 plasma immersion ion implantation into silicon, IIT2012 Proceedings

H.Y.A. Chung, J. Niess, W. Dietl, G. Roters, W. Lerch, Z, Nenyei, A. Ludsteck, J. Schulze, I. Eisele, K. Wieczorek, N. Krumm, RTP Grown Oxynitride Layers Meet Gate Challenges, Semiconductor International, Vol. 27 (10), p. 73-80 (9/2004)

Z. Essa, F. Cristiano, Y. Spiegel, P. Boulenc, Y. Oiu, M. Quillec, N. Taleb, A. Burenkov, M. Hackenberg, E. Bedel-Pereira, V. Mortet, F. Torregrosa, C. Tavernier: BF3 PIII modeling, implantation, amorphization and diffusion, IIT2012 Proceedings

S.B Felch, F. Torresgrosa, H. Etienne, Y. Spiegel, L. Roux, D. Turnbaugh: PULSION® HP, Tunable, High productivity Plasma Doping. IIT2010 Kyoto, Japan. AIP Conf proceedings, p. 333-336

K. Huet, R. Lin, C. Boniface, F. Desse, D. H. Petersen, O. Hansen, N. Variam, A. La Magna, M. Schuhmacher, and A. Jensen, "Activation of ion implanted Si for backside processing by Ultra-fast Laser Thermal Annealing: Energy homogeneity and micro-scale sheet resistance," in 17th International Conference on Advanced Thermal Processing of Semiconductors, 2009 (RTP), p. 1-19

K. Huet, C. Boniface, R. Negru, P. Aing, and J. Venturini, "Full Device Exposure Laser Thermal Annealing: High performance and high yield junction formation process," in 18th International Conference on Advanced Thermal Processing of Semiconductors (RTP), 2010, p. 50-52

K. Huet, C. Boniface, J. Venturini, Z. A. F. Ali-Guerry, R. Beneyton, M. Marty, D. Dutartre, and F. Roy, "High Performance and High Yield Junction Formation with Full Device Exposure Laser Thermal Annealing," in Proceedings of Intl. Image Sensor Workshop (IISW), Hokkaido, Japan, 2011

A. Lange, J. Haase, and H.T. Mau, “Fitting Standard Cell Performance to Generalized Lambda Distributions”, Great Lakes Symposium on VLSI, Lausanne, Switzerland, May 2011

A. Lange, C. Sohrmann, R. Jancke, J. Haase, B. Cheng, U. Kovac, and A. Asenov, “A General Approach for Multivariate Statistical MOSFET Compact Modeling Preserving Correlations”, European Solid-State Device Research Conference (ESSDERC), Helsinki, Finland, September 2011

A. Lange, J. Haase, ”Moving Variability from Devices to Higher Levels of Abstraction“, Presentation at MOS Modeling and Parameter Extraction Working Group (MOS-AK/GSA), Dresden, Germany, April 2012

W. Lerch, J. Niess (ed.), Rapid Thermal Processing and Beyond: Applications in Semiconductor Processing, Materials Science Forum Vols. 573-574 (2008), ISBN 0-87849-391-3

W. Lerch, W. Kegel, J. Niess, A. Gschwandtner, J. Gelpey and Fuccio Cristiano, Scaling Requires Continuous Innovation in Thermal Processing: Low-Temperature Plasma Oxidation, ECS Trans. 2012, Volume 45, Issue 6, p. 151-161 (doi: 10.1149/1.3700948)

J.K. Lorenz, E. Bär, T. Clees, R. Jancke, C.P.J. Salzig, S. Selberherr, Hierarchical Simulation of Process Variations and Their Impact on Circuits and Systems: Methodology, IEEE Trans. Electron Devices 58 (2011) 2218

J.K. Lorenz, E. Bär, T. Clees, P. Evanschitzky, R. Jancke, C. Kampen, U. Paschen, C.P.J. Salzig, S. Selberherr, Hierarchical Simulation of Process Variations and Their Impact on Circuits and Systems: Results, IEEE Trans. Electron Devices 58 (2011) 2227

M. Nedjalkov,  S. Selberherr, D.K. Ferry, D. Vasileska, P. Dollfus, D. Querlioz, I. Dimov, P. Schwaha, Physical scales in the Wigner–Boltzmann equation, Annals of Physics, in print, Online version

J. Niess, C. Kirchner, W. Dietl, H.-J. Meyer, B. Nadig, W. Lerch, I. Costina, R. Kurps, D. Bolze, Highly reliable rapid thermal selective gate re-oxidation process of advanced metal gate stacks with tungsten electrode, 15th IEEE Intl. Conf. on Advanced Thermal Processing of Semiconductors – RTP 2007, Catania, Italy, ISBN 1-4244-1227-7, (2007), p. 209-214

G. Roy, A.R. Brown, F. Adamu-Lema, S. Roy, A. Asenov, Simulation study of individual and combined sources of intrinsic parameter fluctuations in conventional nano-MOSFETs, IEEE Transactions on Electron Devices, Vol. 53, No. 12, p. 3063-3070, (2006)

Y. Spiegel, F. Torregrosa, H. Etienne, S.B. Felch, L. Roux, D. Turnbaugh: Different Profile responses to dose variation for B2H6 an d BF3 Plasma Doping using PULSION®, IIT2010 Kyoto, Japan AIP Conf proceedings, p. 158-160